Changing the IC Design Paradigm,
Changing the IC Industry

"In order to change an existing paradigm you do not struggle to try and change the problematic model. You create a new model and make the old one obsolete."
  - R. Buckminster Fuller

Today's IC architectures, communications paths and interfaces are based on the the single-memory, stored program design commonly called the von Neumann architecture, pioneered by John von Neumann between 1949 and 1953, and based on the work of J. Presper Eckert and John W. Mauchly (inventors of the ENIAC computer at the University of Pennsylvania, delivered to the US government in 1946). This legacy architecture, which is now over 60 years old, creates a host of problems, challenges and inherent limitations for modern designers, manufactures' and programmers of ICs. The litany of these problems/challenges/limitations include power consumption, heat generation, clock skew, data skew, speed limitations imposed by transmission line length, complex connectivity [a single Pentium has over 1,500 pin-outs], limits in respect to dynamic re-configurability and distributed processing, and ever-more expensive design and manufacturing costs due to shrinking geometries and the need to re-design interfaces and chip packages for each new generation of geometry and for particular product applications.

Advanced Processor Architectures, LLC ("APA") has developed a simple, elegant solution that addresses the von Neumann architecture's technical limitations and inherent problems, and that provides an economical path forward for 21st Century computing applications such as distributed processing, dynamic re-configurability, parallel processing, floating point processing, three-dimensional processing, and scalability using a standard package and standard interface [from a single chip carrier to tens of thousands of chip carrier devices without redesign or retooling]. APA's new paradigm also results in efficient, low-cost, high-yield manufacturing and accelerated product development.

APA's innovative approach to new architecture for micro-processor systems has been reviewed by nationally known persons in universities, government and industry. Their specific areas of expertise included reconfiguration and very high speed computational capabilities.


Standardized Package and Interface Design. Results: (i) creates scalable devices, from one chip carrier in a smart phone to tens of thousands of chip carriers in a super-computer; (ii) lowers new IC design costs, and (iii) accelerates product development.

Superior, Flexible Processing Capabilities in One Package. Single design enables (i) distributed processing, (ii) mass data processing, (iii) floating point processing, and (iv) three-dimensional processing. Result: One design serves the IC industry's product needs for virtually every commercial application.

Speedier Processing. The design includes multiple communications paths at the chip and packaging level that completely eliminates or significantly reduces buses, mechanical connections, drivers, and transmission lines. Result: faster through-put.

Re-configurable, both statically and dynamically. Results: (i) configure the machine to the problem, not the problem to the machine; (ii) provides the ability to identify, isolate and work around a failure (in a transmission line, in a receiver line, at the chip carrier device level, or at a process-module level); can reconfigure at the device level, the fabric level, and the systems level; and (iv) can reconfigure signal protocols, data routing, data rates, and peripheral interfaces.

50% of the Power Consumption of Current ICs. Results: (i) design eliminates signal line drivers and thousands of connections to the substrate, (ii) generates less heat, and (iii) lowers power source requirements while prolonging battery life in battery-dependant products.

Less Expensive, Higher-Yield Manufacturing of the IC Package. Simple, standard design lowers tooling and testing costs while increasing wafer yields. Result: More efficient, cost-effective manufacturing of ICs.

Eliminates the need for a mother board. Results: smaller, lighter, more durable products that are less expensive to manufacture.

Solves the von Neumann architectural problems without shrinking geometries and without building new, multi-billion dollar fabrication facilities.